A. Technical Field
The present invention relates to analog-to-digital converters (ADCs), and more particularly, to systems, devices, and methods of increasing conversion accuracy by reducing undesired current flow into reference voltage sources applied to multiplying digital-to-analog converters (MDACs).
B. Background of the Invention
Switched-capacitor circuits are an established technique for the processing of analog signals, and they are often preferred for high-speed and high-resolution filters and ADC applications, such as pipeline and sigma-delta ADC. In pipeline ADC applications, the burden of quantizing a continuous analog input signal is distributed among multiple stages. Typically, each stage has a sub-ADC that quantizes the input signal, a DAC that subtracts an estimate of the input signal, and a residue amplifier that amplifies the difference to be further processed by a subsequent stage. The DAC and residue amplifier together are known as multiplying digital-to-analog converter, or MDAC. The DAC structure utilizes a reference voltage that ideally is insensitive to the input signal or ADC data. Settling the reference voltage to a precise voltage level is one of the primary challenges for high accuracy data converters. The settling of the reference voltage is made even more challenging due to the simultaneous residue amplification, which injects or draws current into the reference voltage as the output residue voltage approaches its final value. What is needed are tools for circuit designers to overcome the above-described limitations.